[2602.16075] DARTH-PUM: A Hybrid Processing-Using-Memory Architecture

[2602.16075] DARTH-PUM: A Hybrid Processing-Using-Memory Architecture

arXiv - Machine Learning 4 min read Article

Summary

DARTH-PUM proposes a hybrid Processing-Using-Memory architecture that integrates analog and digital PUM to enhance computational efficiency across various applications.

Why It Matters

This research addresses the limitations of traditional analog PUM architectures by introducing a versatile framework that combines both analog and digital processing. This innovation could significantly improve the performance of machine learning and cryptographic applications, making it relevant for advancements in hardware architecture and computational efficiency.

Key Takeaways

  • DARTH-PUM integrates analog and digital PUM for enhanced performance.
  • The architecture supports a wide range of applications, including AES encryption and neural networks.
  • It offers significant speedups compared to traditional architectures, improving efficiency.
  • Optimized peripheral circuitry and programming interfaces facilitate practical implementation.
  • The design is scalable, catering to both embedded systems and large-scale computing.

Computer Science > Hardware Architecture arXiv:2602.16075 (cs) [Submitted on 17 Feb 2026] Title:DARTH-PUM: A Hybrid Processing-Using-Memory Architecture Authors:Ryan Wong, Ben Feinberg, Saugata Ghose View a PDF of the paper titled DARTH-PUM: A Hybrid Processing-Using-Memory Architecture, by Ryan Wong and 2 other authors View PDF HTML (experimental) Abstract:Analog processing-using-memory (PUM; a.k.a. in-memory computing) makes use of electrical interactions inside memory arrays to perform bulk matrix-vector multiplication (MVM) operations. However, many popular matrix-based kernels need to execute non-MVM operations, which analog PUM cannot directly perform. To retain its energy efficiency, analog PUM architectures augment memory arrays with CMOS-based domain-specific fixed-function hardware to provide complete kernel functionality, but the difficulty of integrating such specialized CMOS logic with memory arrays has largely limited analog PUM to being an accelerator for machine learning inference, or for closely related kernels. An opportunity exists to harness analog PUM for general-purpose computation: recent works have shown that memory arrays can also perform Boolean PUM operations, albeit with very different supporting hardware and electrical signals than analog PUM. We propose DARTH-PUM, a general-purpose hybrid PUM architecture that tackles key hardware and software challenges to integrating analog PUM and digital PUM. We propose optimized peripheral circuitry, coor...

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