[2602.18072] HiAER-Spike Software-Hardware Reconfigurable Platform for Event-Driven Neuromorphic Computing at Scale
Summary
The HiAER-Spike platform is a modular neuromorphic computing system designed for large-scale spiking neural networks, featuring advanced hardware and software integration for efficient event-driven processing.
Why It Matters
This research addresses the growing need for scalable neuromorphic computing solutions that can handle complex tasks in real-time, making it relevant for advancements in AI and machine learning applications. The platform's accessibility promotes collaboration and innovation within the neuromorphic community.
Key Takeaways
- HiAER-Spike supports spiking neural networks with up to 160 million neurons.
- The platform is optimized for low-latency event-driven inference in both edge and cloud environments.
- A user-friendly Python interface simplifies configuration and execution for researchers.
- The system demonstrates capabilities in various tasks, including event-driven vision.
- Feedback from the community is encouraged to enhance the platform's development.
Computer Science > Hardware Architecture arXiv:2602.18072 (cs) [Submitted on 20 Feb 2026] Title:HiAER-Spike Software-Hardware Reconfigurable Platform for Event-Driven Neuromorphic Computing at Scale Authors:Gwenevere Frank, Gopabandhu Hota, Keli Wang, Christopher Deng, Krish Arora, Diana Vins, Abhinav Uppal, Omowuyi Olajide, Kenneth Yoshimoto, Qingbo Wang, Mari Yamaoka, Johannes Leugering, Stephen Deiss, Leif Gibb, Gert Cauwenberghs View a PDF of the paper titled HiAER-Spike Software-Hardware Reconfigurable Platform for Event-Driven Neuromorphic Computing at Scale, by Gwenevere Frank and 14 other authors View PDF HTML (experimental) Abstract:In this work, we present HiAER-Spike, a modular, reconfigurable, event-driven neuromorphic computing platform designed to execute large spiking neural networks with up to 160 million neurons and 40 billion synapses - roughly twice the neurons of a mouse brain at faster than real time. This system, assembled at the UC San Diego Supercomputer Center, comprises a co-designed hard- and software stack that is optimized for run-time massively parallel processing and hierarchical address-event routing (HiAER) of spikes while promoting memory-efficient network storage and execution. The architecture efficiently handles both sparse connectivity and sparse activity for robust and low-latency event-driven inference for both edge and cloud computing. A Python programming interface to HiAER-Spike, agnostic to hardware-level detail, shields the user...