[2603.03880] Joint Hardware-Workload Co-Optimization for In-Memory Computing Accelerators

Computer Science > Hardware Architecture arXiv:2603.03880 (cs) [Submitted on 4 Mar 2026] Title:Joint Hardware-Workload Co-Optimization for In-Memory Computing Accelerators Authors:Olga Krestinskaya, Mohammed E. Fouda, Ahmed Eltawil, Khaled N. Salama View a PDF of the paper titled Joint Hardware-Workload Co-Optimization for In-Memory Computing Accelerators, by Olga Krestinskaya and 3 other authors View PDF HTML (experimental) Abstract:Software-hardware co-design is essential for optimizing in-memory computing (IMC) hardware accelerators for neural networks. However, most existing optimization frameworks target a single workload, leading to highly specialized hardware designs that do not generalize well across models and applications. In contrast, practical deployment scenarios require a single IMC platform that can efficiently support multiple neural network workloads. This work presents a joint hardware-workload co-optimization framework based on an optimized evolutionary algorithm for designing generalized IMC accelerator architectures. By explicitly capturing cross-workload trade-offs rather than optimizing for a single model, the proposed approach significantly reduces the performance gap between workload-specific and generalized IMC designs. The framework is evaluated on both RRAM- and SRAM-based IMC architectures, demonstrating strong robustness and adaptability across diverse design scenarios. Compared to baseline methods, the optimized designs achieve energy-delay-a...