[2601.02624] LAsset: An LLM-assisted Security Asset Identification Framework for System-on-Chip (SoC) Verification

Computer Science > Cryptography and Security arXiv:2601.02624 (cs) [Submitted on 6 Jan 2026 (v1), last revised 7 Apr 2026 (this version, v2)] Title:LAsset: An LLM-assisted Security Asset Identification Framework for System-on-Chip (SoC) Verification Authors:Md Ajoad Hasan, Dipayan Saha, Khan Thamid Hasan, Nashmin Alam, Azim Uddin, Sujan Kumar Saha, Mark Tehranipoor, Farimah Farahmandi View a PDF of the paper titled LAsset: An LLM-assisted Security Asset Identification Framework for System-on-Chip (SoC) Verification, by Md Ajoad Hasan and 7 other authors View PDF HTML (experimental) Abstract:The growing complexity of modern system-on-chip (SoC) and IP designs is making security assurance difficult day by day. One of the fundamental steps in the pre-silicon security verification of a hardware design is the identification of security assets, as it substantially influences downstream security verification tasks, such as threat modeling, security property generation, and vulnerability detection. Traditionally, assets are determined manually by security experts, requiring significant time and expertise. To address this challenge, we present LAsset, a novel automated framework that leverages large language models (LLMs) to identify security assets from both hardware design specifications and register-transfer level (RTL) descriptions. The framework performs structural and semantic analysis to identify intra-module primary and secondary assets and derives inter-module relationship...