[2603.05232] SlideSparse: Fast and Flexible (2N-2):2N Structured Sparsity

[2603.05232] SlideSparse: Fast and Flexible (2N-2):2N Structured Sparsity

arXiv - Machine Learning 3 min read

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Abstract page for arXiv paper 2603.05232: SlideSparse: Fast and Flexible (2N-2):2N Structured Sparsity

Computer Science > Machine Learning arXiv:2603.05232 (cs) [Submitted on 5 Mar 2026] Title:SlideSparse: Fast and Flexible (2N-2):2N Structured Sparsity Authors:Hanyong Shao, Yingbo Hao, Ting Song, Yan Xia, Di Zhang, Shaohan Huang, Xun Wu, Songchen Xu, Le Xu, Li Dong, Zewen Chi, Yi Zou, Furu Wei View a PDF of the paper titled SlideSparse: Fast and Flexible (2N-2):2N Structured Sparsity, by Hanyong Shao and 12 other authors View PDF HTML (experimental) Abstract:NVIDIA's 2:4 Sparse Tensor Cores deliver 2x throughput but demand strict 50% pruning -- a ratio that collapses LLM reasoning accuracy (Qwen3: 54% to 15%). Milder $(2N-2):2N$ patterns (e.g., 6:8, 25% pruning) preserve accuracy yet receive no hardware support, falling back to dense execution without any benefit from sparsity. We present SlideSparse, the first system to unlock Sparse Tensor Core acceleration for the $(2N-2):2N$ model family on commodity GPUs. Our Sliding Window Decomposition reconstructs any $(2N-2):2N$ weight block into $N-1$ overlapping 2:4-compliant windows without any accuracy loss; Activation Lifting fuses the corresponding activation rearrangement into per-token quantization at near-zero cost. Integrated into vLLM, SlideSparse is evaluated across various GPUs (A100, H100, B200, RTX 4090, RTX 5080, DGX-spark), precisions (FP4, INT8, FP8, BF16, FP16), and model families (Llama, Qwen, BitNet). On compute-bound workloads, the measured speedup ratio (1.33x) approaches the theoretical upper-bound $N/(N-1)...

Originally published on March 06, 2026. Curated by AI News.

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