[2603.01170] ATLAS: AI-Assisted Threat-to-Assertion Learning for System-on-Chip Security Verification
About this article
Abstract page for arXiv paper 2603.01170: ATLAS: AI-Assisted Threat-to-Assertion Learning for System-on-Chip Security Verification
Computer Science > Cryptography and Security arXiv:2603.01170 (cs) [Submitted on 1 Mar 2026] Title:ATLAS: AI-Assisted Threat-to-Assertion Learning for System-on-Chip Security Verification Authors:Ishraq Tashdid, Kimia Tasnia, Alexander Garcia, Jonathan Valamehr, Sazadur Rahman View a PDF of the paper titled ATLAS: AI-Assisted Threat-to-Assertion Learning for System-on-Chip Security Verification, by Ishraq Tashdid and 3 other authors View PDF Abstract:This work presents ATLAS, an LLM-driven framework that bridges standardized threat modeling and property-based formal verification for System-on-Chip (SoC) security. Starting from vulnerability knowledge bases such as Common Weakness Enumeration (CWE), ATLAS identifies SoC-specific assets, maps relevant weaknesses, and generates assertion-based security properties and JasperGold scripts for verification. By combining asset-centric analysis with standardized threat model templates and multi-source SoC context, ATLAS automates the transformation from vulnerability reasoning to formal proof. Evaluated on three HACK@DAC benchmarks, ATLAS detected 39/48 CWEs and generated correct properties for 33 of those bugs, advancing automated, knowledge-driven SoC security verification toward a secure-by-design paradigm. Comments: Subjects: Cryptography and Security (cs.CR); Artificial Intelligence (cs.AI) Cite as: arXiv:2603.01170 [cs.CR] (or arXiv:2603.01170v1 [cs.CR] for this version) https://doi.org/10.48550/arXiv.2603.01170 Focus to ...